This course focuses on high-performance FPGA system design for compute-intensive, real-time, and safety-critical applications. Learners gain expertise in advanced HDL coding, timing closure, high-speed interfaces, and hardware acceleration techniques used in aerospace, defence, AI, and telecom systems.
Fundamental Topics
Fundamentals of FPGA design, including architecture, HDL coding, digital circuits, timing, I/O interfacing, and simulation.
FPGA architecture
HDL review (VHDL/Verilog)
Timing concepts
Intermediate Topics
Intermediate FPGA design covering FSMs, pipelining, memory interfacing, clock management, DSP, HLS, and partial reconfiguration.
Pipelining & parallelism
AXI & high-speed interfaces
IP integration
Advanced Topics
Advanced FPGA design covering SoC integration, high-speed interfaces, hardware-software co-design, AI acceleration, power optimization, security.
High-level synthesis (HLS)
FPGA acceleration for AI
Multi-clock & CDC design
Course Outcomes
Master FPGA design, implementing SoC, high-speed interfaces, hardware-software co-design, AI acceleration, optimization, and secure systems.